1. Field of the Invention
The present invention relates to coreless packaging substrates and fabrication methods thereof, and more particularly, to a coreless packaging substrate having protruding elements formed on conductive pads of a circuit layer and a fabrication method thereof.
2. Description of Related Art
Along with the rapid development of electronic industries, electronic products are developed toward the trend of multi-function and high electrical performance. To meet the high integration and miniaturization requirements of semiconductor packages, the conductive pads of a coreless packaging substrate are reduced in size. Accordingly, when a chip is disposed on the conductive pads through a plurality of bumps, there is a reduced contact area between the conductive pads and the corresponding bumps, thereby easily resulting in a poor bonding therebetween and adversely affecting the product reliability.
FIG. 1A is a schematic cross-sectional view of a conventional coreless packaging substrate 1 and FIG. 1B is a schematic cross-sectional view of a semiconductor package having a chip 16 disposed on the coreless packaging substrate 1 through a plurality of bumps 17.
Referring to FIGS. 1A and 1B, the coreless packaging substrate 1 has a dielectric layer 10 having opposite first and second surfaces 10a, 10b, a first circuit layer 11 formed on the first surface 10a of the dielectric layer 10 and having a plurality of first conductive pads 111, a second circuit layer 12 formed on the second surface 10b of the dielectric layer 10 and having a plurality of second conductive pads 121, a plurality of conductive vias 13 formed in the dielectric layer 10 for electrically connecting the first circuit layer 11 and the second circuit layer 12, a first insulating layer 14 formed on the first surface 10a of the dielectric layer 10 and having a plurality of first openings 141 exposing contact surfaces 112 of the first conductive pads 111, and a second insulating layer 15 formed on the second surface 10b of the dielectric layer 10 and having a plurality of second openings 151 exposing the second conductive pads 121.
However, since the contact surfaces 112 of the first conductive pads 111 are planar, there will be a small contact area between the first conductive pads 111 and the bumps 17, thereby resulting in a poor bonding between the first conductive pads 111 and the bumps 17 and reducing the product reliability.
Therefore, there is a need to provide a coreless packaging substrate and a fabrication method thereof so as to overcome the above-described drawbacks.